Update 1 of the 2.6.34 linux kernel release
[linux-2.6.34-lpc32xx.git] / drivers / rtc / rtc-lpc32xx.c
1 /*
2  * drivers/rtc/rtc-lpc32xx.c
3  *
4  * Author: Kevin Wells <kevin.wells@nxp.com>
5  *
6  * Copyright (C) 2010 NXP Semiconductors
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  */
18
19 #include <linux/err.h>
20 #include <linux/fs.h>
21 #include <linux/interrupt.h>
22 #include <linux/module.h>
23 #include <linux/platform_device.h>
24 #include <linux/rtc.h>
25 #include <linux/spinlock.h>
26 #include <linux/types.h>
27 #include <linux/io.h>
28 #include <linux/slab.h>
29
30 /*
31  * Clock and Power control register offsets
32  */
33 #define RTC_UCOUNT(x)           ((x) + 0x00)
34 #define RTC_DCOUNT(x)           ((x) + 0x04)
35 #define RTC_MATCH0(x)           ((x) + 0x08)
36 #define RTC_MATCH1(x)           ((x) + 0x0C)
37 #define RTC_CTRL(x)             ((x) + 0x10)
38 #define RTC_INTSTAT(x)          ((x) + 0x14)
39 #define RTC_KEY(x)              ((x) + 0x18)
40 #define RTC_SRAM(x, y)          ((x) + 0x80 + ((y) * 4))
41
42 #define RTC_MATCH0_EN           (1 << 0)
43 #define RTC_MATCH1_EN           (1 << 1)
44 #define RTC_ONSW_MATCH0_EN      (1 << 2)
45 #define RTC_ONSW_MATCH1_EN      (1 << 3)
46 #define RTC_SW_RESET            (1 << 4)
47 #define RTC_CNTR_DIS            (1 << 6)
48 #define RTC_ONSW_FORCE_HIGH     (1 << 7)
49
50 #define RTC_MATCH0_INT_STS      (1 << 0)
51 #define RTC_MATCH1_INT_STS      (1 << 1)
52 #define RTC_ONSW_INT_STS        (1 << 2)
53
54 #define RTC_KEY_ONSW_LOADVAL    0xB5C13F27
55
56 static const char rtc_name[] = "rtc-lpc32xx";
57
58 struct lpc32xx_rtc_priv {
59         void __iomem *rtc_base;
60         int irq;
61         int alarm_enabled;
62         struct rtc_device *rtc;
63         spinlock_t lock;
64 };
65
66 static inline void write_seconds(u32 iobase, unsigned long secs)
67 {
68         u32 tmp;
69
70         tmp = readl(RTC_CTRL(iobase));
71         tmp |= RTC_CNTR_DIS;
72         writel(tmp, RTC_CTRL(iobase));
73
74         writel(secs, RTC_UCOUNT(iobase));
75         writel((0xFFFFFFFF - secs), RTC_DCOUNT(iobase));
76
77         tmp &= ~RTC_CNTR_DIS;
78         writel(tmp, RTC_CTRL(iobase));
79 }
80
81 static int lpc32xx_rtc_read_time(struct device *dev, struct rtc_time *time)
82 {
83         unsigned long elapsed_sec;
84         struct lpc32xx_rtc_priv *lpc32xx_rtc_dat = dev_get_drvdata(dev);
85
86         elapsed_sec = readl(RTC_UCOUNT(lpc32xx_rtc_dat->rtc_base));
87
88         rtc_time_to_tm(elapsed_sec, time);
89
90         return 0;
91 }
92
93 static int lpc32xx_rtc_set_mmss(struct device *dev, unsigned long secs)
94 {
95         struct lpc32xx_rtc_priv *lpc32xx_rtc_dat = dev_get_drvdata(dev);
96
97         spin_lock_irq(&lpc32xx_rtc_dat->lock);
98         write_seconds((u32) lpc32xx_rtc_dat->rtc_base, secs);
99         spin_unlock_irq(&lpc32xx_rtc_dat->lock);
100
101         return 0;
102 }
103
104 static int lpc32xx_rtc_read_alarm(struct device *dev,
105         struct rtc_wkalrm *wkalrm)
106 {
107         struct lpc32xx_rtc_priv *lpc32xx_rtc_dat = dev_get_drvdata(dev);
108         unsigned long alarmsecs;
109
110         alarmsecs = readl(RTC_MATCH0(lpc32xx_rtc_dat->rtc_base));
111         wkalrm->enabled = lpc32xx_rtc_dat->alarm_enabled;
112
113         rtc_time_to_tm(alarmsecs, &wkalrm->time);
114
115         return 0;
116 }
117
118 static int lpc32xx_rtc_set_alarm(struct device *dev,
119         struct rtc_wkalrm *wkalrm)
120 {
121         struct lpc32xx_rtc_priv *lpc32xx_rtc_dat = dev_get_drvdata(dev);
122         unsigned long alarmsecs;
123         int ret;
124
125         ret = rtc_tm_to_time(&wkalrm->time, &alarmsecs);
126         if (ret < 0) {
127                 dev_err(dev, "Failed to convert time: %d\n", ret);
128                 return ret;
129         }
130
131         spin_lock_irq(&lpc32xx_rtc_dat->lock);
132
133         if (lpc32xx_rtc_dat->alarm_enabled)
134                 writel(~RTC_MATCH0_EN &
135                         readl(RTC_CTRL(lpc32xx_rtc_dat->rtc_base)),
136                         RTC_CTRL(lpc32xx_rtc_dat->rtc_base));
137
138         writel(alarmsecs, RTC_MATCH0(lpc32xx_rtc_dat->rtc_base));
139         lpc32xx_rtc_dat->alarm_enabled = wkalrm->enabled;
140
141         if (wkalrm->enabled) {
142                 writel(RTC_MATCH0_INT_STS,
143                         RTC_INTSTAT(lpc32xx_rtc_dat->rtc_base));
144
145                 writel(RTC_MATCH0_EN |
146                         readl(RTC_CTRL(lpc32xx_rtc_dat->rtc_base)),
147                         RTC_CTRL(lpc32xx_rtc_dat->rtc_base));
148         }
149
150         spin_unlock_irq(&lpc32xx_rtc_dat->lock);
151
152         return 0;
153 }
154
155 static int lpc32xx_rtc_proc(struct device *dev, struct seq_file *seq)
156 {
157         struct lpc32xx_rtc_priv *lpc32xx_rtc_dat = dev_get_drvdata(dev);
158         u32 tmp;
159
160         tmp = readl(RTC_CTRL(lpc32xx_rtc_dat->rtc_base));
161         seq_printf(seq, "Alarm_IRQ\t: %s\n",
162                    (tmp & RTC_MATCH0_EN) ? "yes" : "no");
163
164         return 0;
165 }
166
167 static int lpc32xx_rtc_alarm_irq_enable(struct device *dev,
168         unsigned int enabled)
169 {
170         struct lpc32xx_rtc_priv *lpc32xx_rtc_dat = dev_get_drvdata(dev);
171
172         if (enabled) {
173                 if (!lpc32xx_rtc_dat->alarm_enabled) {
174                         spin_lock_irq(&lpc32xx_rtc_dat->lock);
175                         lpc32xx_rtc_dat->alarm_enabled = 1;
176                         writel(RTC_MATCH0_EN |
177                                 readl(RTC_CTRL(lpc32xx_rtc_dat->rtc_base)),
178                                 RTC_CTRL(lpc32xx_rtc_dat->rtc_base));
179                         spin_unlock_irq(&lpc32xx_rtc_dat->lock);
180                 }
181         } else if (lpc32xx_rtc_dat->alarm_enabled) {
182                 spin_lock_irq(&lpc32xx_rtc_dat->lock);
183                 lpc32xx_rtc_dat->alarm_enabled = 0;
184                 writel(~RTC_MATCH0_EN &
185                         readl(RTC_CTRL(lpc32xx_rtc_dat->rtc_base)),
186                         RTC_CTRL(lpc32xx_rtc_dat->rtc_base));
187                 spin_unlock_irq(&lpc32xx_rtc_dat->lock);
188         }
189
190         return 0;
191 }
192
193 static irqreturn_t lpc32xx_rtc_alarm_interrupt(int irq, void *dev)
194 {
195         struct lpc32xx_rtc_priv *lpc32xx_rtc_dat =
196                 (struct lpc32xx_rtc_priv *) dev;
197
198         spin_lock(&lpc32xx_rtc_dat->lock);
199
200         /* If the alarm isn't disabled, the match will keep occuring, so
201                 disable it now */
202         writel(readl(RTC_CTRL(lpc32xx_rtc_dat->rtc_base)) &
203                 ~RTC_MATCH0_EN, RTC_CTRL(lpc32xx_rtc_dat->rtc_base));
204
205         /* Write a large value to the match value so the RTC won't
206            keep firing the match status */
207         writel(0xFFFFFFFF, RTC_MATCH0(lpc32xx_rtc_dat->rtc_base));
208         writel(RTC_MATCH0_INT_STS,
209                 RTC_INTSTAT(lpc32xx_rtc_dat->rtc_base));
210
211         rtc_update_irq(lpc32xx_rtc_dat->rtc, 1, RTC_IRQF | RTC_AF);
212
213         spin_unlock(&lpc32xx_rtc_dat->lock);
214
215         return IRQ_HANDLED;
216 }
217
218 static const struct rtc_class_ops lpc32xx_rtc_ops = {
219         .read_time              = lpc32xx_rtc_read_time,
220         .set_mmss               = lpc32xx_rtc_set_mmss,
221         .read_alarm             = lpc32xx_rtc_read_alarm,
222         .set_alarm              = lpc32xx_rtc_set_alarm,
223         .proc                   = lpc32xx_rtc_proc,
224         .alarm_irq_enable       = lpc32xx_rtc_alarm_irq_enable,
225 };
226
227 static int __devinit lpc32xx_rtc_probe(struct platform_device *pdev)
228 {
229         struct resource *res, *mem = NULL;
230         struct lpc32xx_rtc_priv *lpc32xx_rtc_dat = NULL;
231         int rtcirq, retval;
232         u32 tmp;
233
234         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
235         if (!res) {
236                 dev_err(&pdev->dev, "Can't get memory resource\n");
237                 return -ENOENT;
238         }
239
240         rtcirq = platform_get_irq(pdev, 0);
241         if ((rtcirq < 0) || (rtcirq >= NR_IRQS)) {
242                 dev_err(&pdev->dev, "Can't get interrupt resource\n");
243                 return -ENOENT;
244         }
245
246         lpc32xx_rtc_dat = kzalloc(sizeof(struct lpc32xx_rtc_priv),
247                 GFP_KERNEL);
248         if (unlikely(!lpc32xx_rtc_dat)) {
249                 dev_err(&pdev->dev, "Can't allocate memory\n");
250                 return -ENOMEM;
251         }
252         lpc32xx_rtc_dat->irq = rtcirq;
253
254         mem = request_mem_region(res->start, resource_size(res), pdev->name);
255         if (!mem) {
256                 dev_err(&pdev->dev, "RTC registers are not free\n");
257                 retval = -EBUSY;
258                 goto err_reqmem;
259         }
260
261         lpc32xx_rtc_dat->rtc_base = ioremap(res->start,
262                 res->end - res->start + 1);
263         if (!lpc32xx_rtc_dat->rtc_base) {
264                 dev_err(&pdev->dev, "Can't map memory\n");
265                 retval = -EIO;
266                 goto err_noremap;
267         }
268
269         spin_lock_init(&lpc32xx_rtc_dat->lock);
270
271         /* If RTC has never been previously setup, then set it up
272            now */
273         if (readl(RTC_KEY(lpc32xx_rtc_dat->rtc_base)) !=
274                 RTC_KEY_ONSW_LOADVAL) {
275                 spin_lock_irq(&lpc32xx_rtc_dat->lock);
276                 tmp = readl(RTC_CTRL(lpc32xx_rtc_dat->rtc_base));
277                 tmp &= ~(RTC_SW_RESET | RTC_CNTR_DIS | RTC_MATCH0_EN |
278                         RTC_MATCH1_EN | RTC_ONSW_MATCH0_EN |
279                         RTC_ONSW_MATCH1_EN | RTC_ONSW_FORCE_HIGH);
280                 writel(tmp, RTC_CTRL(lpc32xx_rtc_dat->rtc_base));
281
282                 /* Clear latched interrupt states */
283                 writel(0xFFFFFFFF, RTC_MATCH0(lpc32xx_rtc_dat->rtc_base));
284                 writel(RTC_MATCH0_INT_STS | RTC_MATCH1_INT_STS |
285                         RTC_ONSW_INT_STS,
286                         RTC_INTSTAT(lpc32xx_rtc_dat->rtc_base));
287
288                 /* Write key value to RTC so it won't reload on reset */
289                 writel(RTC_KEY_ONSW_LOADVAL,
290                         RTC_KEY(lpc32xx_rtc_dat->rtc_base));
291
292                 spin_unlock_irq(&lpc32xx_rtc_dat->lock);
293         } else if (readl(RTC_CTRL(lpc32xx_rtc_dat->rtc_base)) & RTC_MATCH0_EN)
294                 lpc32xx_rtc_dat->alarm_enabled = 1;
295
296         platform_set_drvdata(pdev, lpc32xx_rtc_dat);
297
298         device_init_wakeup(&pdev->dev, 1);
299         lpc32xx_rtc_dat->rtc = rtc_device_register(rtc_name, &pdev->dev,
300                 &lpc32xx_rtc_ops, THIS_MODULE);
301         if (IS_ERR(lpc32xx_rtc_dat->rtc)) {
302                 dev_err(&pdev->dev, "Can't get RTC\n");
303                 retval = PTR_ERR(lpc32xx_rtc_dat->rtc);
304                 goto err_noreg;
305         }
306
307         retval = request_irq(lpc32xx_rtc_dat->irq, lpc32xx_rtc_alarm_interrupt,
308                 IRQF_DISABLED, "rtcalarm", lpc32xx_rtc_dat);
309         if (retval < 0) {
310                 dev_err(&pdev->dev, "Can't request interrupt\n");
311                 goto err_free_irq;
312         }
313
314         return 0;
315
316 err_free_irq:
317         rtc_device_unregister(lpc32xx_rtc_dat->rtc);
318 err_noreg:
319         iounmap(lpc32xx_rtc_dat->rtc_base);
320 err_noremap:
321         release_resource(mem);
322 err_reqmem:
323         kfree(lpc32xx_rtc_dat);
324
325         return retval;
326 }
327
328 static int __devexit lpc32xx_rtc_remove(struct platform_device *pdev)
329 {
330         struct lpc32xx_rtc_priv *lpc32xx_rtc_dat =
331                 platform_get_drvdata(pdev);
332
333         free_irq(lpc32xx_rtc_dat->irq, pdev);
334         rtc_device_unregister(lpc32xx_rtc_dat->rtc);
335         iounmap(lpc32xx_rtc_dat->rtc_base);
336         release_resource(dev_get_drvdata(&lpc32xx_rtc_dat->rtc->dev));
337         kfree(lpc32xx_rtc_dat);
338
339         return 0;
340 }
341
342 #ifdef CONFIG_PM
343 /* Turn off the alarm if it should not be a wake source. */
344 static int lpc32xx_rtc_suspend(struct device *dev)
345 {
346         struct platform_device *pdev = to_platform_device(dev);
347         struct lpc32xx_rtc_priv *lpc32xx_rtc_dat =
348                 platform_get_drvdata(pdev);
349
350         if (device_may_wakeup(&pdev->dev))
351                 enable_irq_wake(lpc32xx_rtc_dat->irq);
352         else
353                 disable_irq_wake(lpc32xx_rtc_dat->irq);
354
355
356         return 0;
357 }
358
359 /* Enable the alarm if it should be enabled (in case it was disabled to
360  * prevent use as a wake source).
361  */
362 static int lpc32xx_rtc_resume(struct device *dev)
363 {
364         struct platform_device *pdev = to_platform_device(dev);
365         struct lpc32xx_rtc_priv *lpc32xx_rtc_dat =
366                 platform_get_drvdata(pdev);
367
368         if (lpc32xx_rtc_dat->alarm_enabled) {
369                 spin_lock_irq(&lpc32xx_rtc_dat->lock);
370
371                 writel(RTC_MATCH0_EN |
372                         readl(RTC_CTRL(lpc32xx_rtc_dat->rtc_base)),
373                         RTC_CTRL(lpc32xx_rtc_dat->rtc_base));
374                 spin_unlock_irq(&lpc32xx_rtc_dat->lock);
375         }
376
377         return 0;
378 }
379
380 /* Unconditionally disable the alarm */
381 static int lpc32xx_rtc_freeze(struct device *dev)
382 {
383         struct platform_device *pdev = to_platform_device(dev);
384         struct lpc32xx_rtc_priv *lpc32xx_rtc_dat =
385                 platform_get_drvdata(pdev);
386
387         spin_lock_irq(&lpc32xx_rtc_dat->lock);
388
389         writel(~RTC_MATCH0_EN &
390                 readl(RTC_CTRL(lpc32xx_rtc_dat->rtc_base)),
391                 RTC_CTRL(lpc32xx_rtc_dat->rtc_base));
392
393         return 0;
394 }
395 #else
396 #define lpc32xx_rtc_suspend NULL
397 #define lpc32xx_rtc_resume NULL
398 #define lpc32xx_rtc_freeze NULL
399 #endif
400
401 static const struct dev_pm_ops lpc32xx_rtc_pm_ops = {
402         .suspend = lpc32xx_rtc_suspend,
403         .resume = lpc32xx_rtc_resume,
404         .freeze = lpc32xx_rtc_freeze,
405         .thaw = lpc32xx_rtc_resume,
406         .restore = lpc32xx_rtc_resume
407 };
408
409 static struct platform_driver lpc32xx_rtc_driver = {
410         .probe          = lpc32xx_rtc_probe,
411         .remove         = __devexit_p(lpc32xx_rtc_remove),
412         .driver = {
413                 .name = rtc_name,
414                 .pm = &lpc32xx_rtc_pm_ops,
415         },
416 };
417
418 static int __init lpc32xx_rtc_init(void)
419 {
420         return platform_driver_register(&lpc32xx_rtc_driver);
421 }
422
423 static void __exit lpc32xx_rtc_exit(void)
424 {
425         platform_driver_unregister(&lpc32xx_rtc_driver);
426 }
427
428 module_init(lpc32xx_rtc_init);
429 module_exit(lpc32xx_rtc_exit);
430
431 MODULE_AUTHOR("Kevin Wells <kevin.wells@nxp.com");
432 MODULE_DESCRIPTION("LPC32XX RTC Driver");
433 MODULE_LICENSE("GPL");